Morning time slot

Probefest – bring your DUT or design to the table

Afternoon time slot

Preliminary program:

Full-day in-person seminar with demonstrations

Sjoerd Op 't Land - Technolution

Welcome and shared mission

Xavier Allart and Simon Muff - Keysight

Measurement and simulation - correlation and cases

Paolo Novellini - AMD

Industry trends in the connectivity industry

• Connectivity: the bandwidth goal
• The solution ingredients: line rate, bandwidth, modulation schemes.
• The industry push for link observability: eyescan, pre-fec BER.
• The future: optical connections, why and when

Jens Wülfing - Samtec

Interconnect channel wide modeling simulation and simplification: Fully mated / End to End vs. cascaded models to provide sufficient accuracy for frequencies above 14GHz as essential tool for 112G and beyond

Christian van Kekem -Technolution

How to design for Signal Integrity in a cost-effective manner?

Together with AMD, Keysight and Molex support, we optimized the nominal PCB trace impedance connecting a QSFP-DD module with Versal GTM 112 Gb/s transceivers. By using models of varying realism, we also optimized Return on Modeling Effort (RoME).

André Dekker - Sintecs

Design and verification of Power Integrity

Probefest Readout/Learnings

Designers participating in the Probefest can share what they want on their learnings. The Chatham House Rule applies.

Drinks