Morning time slot

Probefest – bring your DUT or design to the table

Afternoon time slot

Preliminary program:

Full-day in-person seminar with demonstrations

Sjoerd Op 't Land - Technolution
SI/PI Researcher

Welcome and shared mission

Simon Muff - Keysight
Solutions Engineering Manager Europe

Measurement and simulation - correlation and cases

Paolo Novellini - AMD
Fellow Engineer - RF & IO Specialist

Industry trends in the connectivity industry

• Connectivity: the bandwidth goal
• The solution ingredients: line rate, bandwidth, modulation schemes.
• The industry push for link observability: eyescan, pre-fec BER.
• The future: optical connections, why and when

Jens Wülfing - Samtec
Field Application Engineer

Interconnect channel wide modeling simulation and simplification: Fully mated / End to End vs. cascaded models to provide sufficient accuracy for frequencies above 14GHz as essential tool for 112G and beyond

Christian van Kekem -Technolution
SI/PI Electronics Engineer

How to design for Signal Integrity in a cost-effective manner?

Together with AMD, Keysight and Molex support, we optimized the nominal PCB trace impedance connecting a QSFP-DD module with Versal GTM 112 Gb/s transceivers. By using models of varying realism, we also optimized Return on Modeling Effort (RoME).

André Dekker - Sintecs
PCB Design Architect & SI/PI Educator

Fundamentals of Signal and Power Integrity:

• Volts & amps vs. electric & magnetic fields
• The displacement field: the forgotten current
• Where current really flows
• Why impedance is not a number but a concept
• How this drives SI & PI fundamentals

Probefest Readout/Learnings

Designers participating in the Probefest can share what they want on their learnings. The Chatham House Rule applies.

Drinks